? semiconductor components industries, llc, 2015 june, 2015 ? rev. 0 1 publication order number: nis5452/d nis5452 series +5 volt electronic fuse the nis5452 series is a cost effective, resettable fuse which can greatly enhance the reliability of a hard drive or other circuit from both catastrophic and shutdown failures. it is designed to buffer the load device from excessive input voltage which can damage sensitive circuits. it also includes an overvoltage clamp circuit that limits the output voltage during transients but does not shut the unit down, thereby allowing the load circuit to continue operation. two thermal options are available, latching and auto?retry. features ? integrated power device ? power device thermally protected ? no external current shunt required ? 40 m typical ? internal charge pump ? internal undervoltage lockout circuit ? internal overvoltage clamp ? esd ratings: human body model (hbm); 2000 v machine model (mm); 200 v ? these are pb?free devices and are rohs compliant typical applications ? mother board ? hard drives ? fan drives ordering information device features marking package shipping ? NIS5452MT1TXG thermal latching v clamp = 5.85 v, i lim = 2.1 a @ 18 52 wdfn10 (pb?free) 3000 / tape & reel nis5452mt2txg thermal auto?retry v clamp = 5.85 v, i lim = 2.1 a @ 18 52h wdfn10 (pb?free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. www. onsemi.com marking diagram wdfn10 case 522aa xxx ayw 1 xxx = specific device code a = assembly location y = year w = work week = pb?free package (note: microdot may be in either location) 4.5 amp, 5 volt electronic fuse pin function 1?5 source 6nc 7 ilimit 8 enable/fault 9 dv/dt 10 gnd 11 (flag) vcc
nis5452 series www. onsemi.com 2 figure 1. block diagram enable/ fault source i limit dv/dt gnd vcc enable charge pump thermal shutdown uvlo current limit voltage clamp dv/dt control table 1. functional pin description pin function description 1?5 source this pin is the source of the internal power fet and the output terminal of the fuse. 7 i limit a resistor between this pin and the source pin sets the overload and short circuit current limit levels. 8 enable/fault the enable/fault pin is a tri?state, bidirectional interface. it can be used to enable or disable the output of the device by pulling it to ground using an open drain or open collector device. if a ther- mal fault occurs, the voltage on this pin will go to an intermediate state to signal a monitoring cir- cuit that the device is in thermal shutdown. it can also be connected to another device in this fami- ly to cause a simultaneous shutdown during thermal events. 9 dv/dt the internal dv/dt circuit controls the slew rate of the output voltage at turn on. it has an internal capacitor that allows it to ramp up over a period of 1.4 ms. an external capacitor can be added to this pin to increase the ramp time. if an additional time delay is not required, this pin should be left open. 10 ground negative input voltage to the device. this is used as the internal reference for the ic. 11 (belly pad) v cc positive input voltage to the device. maximum ratings rating symbol value unit input voltage, operating, steady?state (v cc to gnd, note 1) v in ?0.6 to 14 v thermal resistance, junction?to?air 0.1 in 2 copper (note 2) 0.5 in 2 copper (note 2) ja 227 95 c/w thermal resistance, junction?to?lead (pin 1) jl 27 c/w thermal resistance, junction?to?case jc 20 c/w total power dissipation @ t a = 25 c derate above 25 c p max 1.3 10.4 w mw/ c operating temperature range (note 3) t j ?40 to 150 c nonoperating temperature range t j ?55 to 155 c lead temperature, soldering (10 sec) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. negative voltage will not damage device provided that the power dissipation is limited to the rated allowable power for the d evice. 2. 1 oz copper, double?sided fr4. 3. thermal limit is set above the maximum thermal rating. it is not recommended to operate this device at temperatures greater t han the maximum ratings for extended periods of time.
nis5452 series www. onsemi.com 3 electrical characteristics (unless otherwise noted: v cc = 5.0 v, c in = 2.2 f, c l = 70 f, dv/dt pin open, t a = 25 c unless otherwise noted.) characteristics symbol min typ max unit power fet delay time (enabling of chip to i d = 100 ma with 1 a resistive load) t dly 200 s on resistance (note 4) t j = 140 c (note 5) r ds(on) 19 40 60 50 m off state output voltage (v cc = 10 v dc , v gs = 0 v dc , r l = 100 k ) v off 50 200 mv output capacitance (v ds = 5 v dc , v gs = 0 v dc , r l = ) c out 230 pf continuous current (t a = 25 c, 0.5 in 2 pad) (note 5) (t a = 80 c, minimum copper) i d i d 4.5 1.7 a thermal latch shutdown temperature (note 5) t sd 150 175 200 c thermal hysteresis (decrease in die temperature for turn on, does not apply to latching parts) t hyst 45 c under/overvoltage protection v out maximum (v cc = 10 v) nis5452 v out?clamp 5.0 5.85 8.05 v undervoltage lockout (turn on, voltage going high) v uvlo 1.9 2.5 2.8 v uvlo hysteresis v hyst 0.055 0.1 0.250 v current limit kelvin short circuit current limit (note 6) nis5452 (r limit = 18 ) i lim 1.0 2.1 3.6 a overload current limit (note 6) nis5452 (r limit = 18 ) i lim 2.7 a dv/dt circuit output voltage ramp time (enable to v out = 4.7 v) t slew 0.37 1.4 3.0 ms maximum capacitor voltage v max v cc v enable/fault logic level low (output disabled) v in?low 0.35 0.58 0.81 v logic level mid (thermal fault, output disabled) v in?mid 0.82 1.4 1.95 v logic level high (output enabled) v in?high 1.96 2.2 2.5 v high state maximum voltage v in?max 2.51 3.3 5.2 v logic low sink current (v enable = 0 v) i in?low ?12 ?20 a logic high leakage current for external switch (v enable = 3.3 v) i in?leak 1.0 a maximum fanout for fault signal (total number of chips that can be connected to this pin for simultaneous shutdown) fan 3.0 units total device bias current (operational) i bias 400 750 a bias current (shutdown) i bias 100 a minimum operating voltage (notes 5 and 7) v min 2.8 v product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. pulse test: pulse width 300 s, duty cycle 2%. 5. verified by design. 6. refer to explanation of short circuit and overload conditions in application note and8140/d. 7. device will shut down prior to reaching this level based on actual uvlo trip point.
nis5452 series www. onsemi.com 4 figure 2. application circuit with direct current sensing load gnd enable +5 v r s nis5452 source v cc enable i limit dv/dt gnd 1 2 3 4 5 7 11 8 10 9 figure 3. application circuit with kelvin current sensing load gnd enable +5 v r s nis5452 source v cc enable i limit dv/dt gnd 5 4 3 2 1 7 11 8 10 9
nis5452 series www. onsemi.com 5 figure 4. common thermal shutdown source v cc enable i limit dv/dt gnd load enable r s load source v cc i limit enable dv/dt gnd nis545x nisxxxx +5 v +12 v application information basic operation this device is a self?protected, resettable, electronic fuse. it contains circuits to monitor the input voltage, output voltage, output current and die temperature. on application of the input voltage, the device will apply the input voltage to the load based on the restrictions of the controlling circuits. the dv/dt of the output voltage will be controlled by the internal dv/dt circuit. the output voltage will slew from 0 v to the rated output voltage in 1.4 ms, unless additional capacitance is added to the dv/dt pin. the device will remain on as long as the temperature does not exceed the 175 c limit that is programmed into the chip. the current limit circuit does not shut down the part but will reduce the conductivity of the fet to maintain a constant current at the internally set current limit level. the input overvoltage clamp also does not shutdown the part, but will limit the output voltage to the v out ?clamp value in the event that the input exceeds that level. an internal charge pump pr ovides bias for the gate voltage of the internal n?channel power fet and also for the current limit circuit. the remainder of the control circuitry operates between the input voltage (v cc ) and ground. current limit the current limit circuit uses a sensefet along with a reference and amplifier to control the peak current in the device. the sensefet allows for a small fraction of the load current to be measured, which has the advantage of reducing the losses in the sense resistor as well as increasing the value and decreasing the power rating of the sense resistor. sense resistors are typically in the tens of ohms range with power ratings of several milliwatts making them very inexpensive chip resistors. the current limit circuit has two limiting values, one for overload events which are defined as the mode of operation in which the gate is high and the fet is fully enhanced. the short circuit mode of operation occurs when the device is actively limiting the current and the gate is at an intermediate level. for a more detailed description of this circuit please refer to application note and8140. there are two methods of biasing the current limit circuit for this device. they are shown in the two application figures. direct current sensing connects the sense resistor between the current limit pin and the load. this method includes the bond wire resistance in the current limit circuit. this resistance has an impact on the current limit levels for a given resistor and may vary slightly depending on the impedance between the sense resistor and the source pins. the on resistance of the device will be slightly lower in this configuration since all five source pins are connected in parallel and therefore, the effective bond wire resistance is one fifth of the resistance for any given pin. the other method is kelvin sensing. this method uses one of the source pins as the connection for the current sense resistor. this connection senses the voltage on the die and therefore any bond wire resistance and external impedance on the board have no ef fect on the current limit levels. in this configuration the on resistance is slightly increased relative to the direct sense method since only four of the source pins are used for power.
nis5452 series www. onsemi.com 6 overvoltage clamp the overvoltage clamp consists of an amplifier and reference. it monitors the output voltage and if the input voltage exceeds the specified vout maximum for the device, the gate drive of the main fet is reduced to limit the output. this is intended to allow operation through transients while protecting the load. if an overvoltage condition exists for many seconds, the device may overheat due to the voltage drop across the fet combined with the load current. in this event, the thermal protection circuit would shut down the device. undervoltage lockout the undervoltage lockout circuit uses a comparator with hysteresis to monitor the input voltage. if the input voltage drops below the specified level, the output switch will be switched to a high impedance state. dv/dt circuit the dv/dt circuit brings the output voltage up under a linear, controlled rate regardless of the load impedance characteristics. an internal ramp generator creates a linear ramp, and a control circuit forces the output voltage to follow that ramp, scaled by a factor. the default ramp time is approximately 1.4 ms. this can be modified by adding an external capacitor at the dv/dt pin. this pin includes an internal current source of approximately 1 a. since the current level is very low, it is important to use a ceramic cap or other low leakage capacitor. aluminum electrolytic capacitors are not recommended for this circuit. the ramp time from 0 to the nominal output voltage can be determined by the following equation, where t is in seconds: t 0?5 1.25 e6 c ext where: c is in farads t is in seconds any time that the unit shuts down due to a fault, enable shut?down, or recycling of input power, the timing capacitor will be discharged and the output voltage will ramp from 0 at turn on. enable/fault the enable/fault pin is a multi?function, bidirectional pin that can control the output of the chip as well as send information to other devices regarding the state of the chip. when this pin is low, the output of the fuse will be turned off. when this pin is high the output of the fuse will be turned?on. if a thermal fault occurs, this pin will be pulled low to an intermediate level by an internal circuit. to use as a simple enable pin, an open drain or open collector device should be connected to this pin. due to its tri?state operation, it should not be connected to any type of logic with an internal pullup device. if the chip shuts down due to the die temperature reaching its thermal limit, this pin will be pulled down to an intermediate level. this signal can be monitored by an external circuit to communicate that a thermal shutdown has occurred. if this pin is tied to another device in this family (nis5132 or nis5450), a thermal shutdown of one device will cause both devices to disable their outputs. both devices will turn on once the fault is removed for the auto?retry devices. for the latching thermal device, the outputs will be enabled after the enable pin has been pulled to ground with an external switch and then allowed to go high or after the input power has been recycled. for the auto retry devices, both devices will restart as soon as the die temperature of the device in shutdown has been reduced to the lower thermal limit. the thermal options are listed in the ordering table. thermal protection the nis545x includes an internal temperature sensing circuit that senses the temperature on the die of the power fet. if the temperature reaches 175 c, the device will shut down, and remove power from the load. output power can be restored by either recycling the input power or toggling the enable pin. power will automatically be reapplied to the load for auto?retry devices once the die temperature has been reduced by 45 c. the thermal limit has been set high intentionally, to increase the trip time during high power transient events. it is not recommended to operate this device above 150 c for extended periods of time.
nis5452 series www. onsemi.com 7 figure 5. enable/fault signal levels device operational thermal shutdown shutdown, thermal reset fault/enable signal gnd 0.82v 1.95v 3.3v figure 6. enable/fault simplified circuit ? + ? + startup blanking thermal shutdown sd 1.4 v thermal reset enable sd 2.2 v en/fault 3.3 v thermal sd 12 a 0.58 v
nis5452 series www. onsemi.com 8 package dimensions wdfn10, 3x3, 0.5p case 522aa issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d b e 0.15 c a3 a a1 2x 2x 0.15 c dim a min nom max millimeters 0.70 0.75 0.80 a1 0.00 0.03 0.05 a3 0.20 ref b 0.18 0.24 0.30 d 3.00 bsc d2 2.45 2.50 2.55 e 3.00 bsc 1.75 1.80 1.85 e2 e 0.50 bsc 0.19 typ k pin one reference 0.08 c 0.10 c 10x a 0.10 c note 3 l e d2 e2 b b 5 6 10x 1 k 10 10x 10x 0.05 c 0.35 0.40 0.45 l top view side view bottom view *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.1746 2.6016 1.8508 0.5000 pitch 0.5651 10x 3.3048 0.3008 10x dimensions: millimeters on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 nis5452/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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